Cell strings of a NAND flash memory device include a common source line connecting source regions to one another, bitline lines connected to drain regions, respectively, and memory cell transistors connecting the source regions to the drain regions in series.
A method of fabricating the NAND flash memory device includes forming the memory cell transistor on a semiconductor substrate and forming an interlayer dielectric to cover the resultant structure. A trench is formed by patterning the interlayer dielectric to expose a semiconductor substrate of the source regions. The trench is filled by forming the common source line to connect the source regions to one another. Bitline plugs are formed to penetrate the interlayer dielectric. Bitlines are formed to be each connected to the drain region.